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DA9270.008 11 September 2006
MAS9270
IC FOR 10.00 - 30.00 MHz VCTCXO
* * * * * * *
DESCRIPTION
The MAS9270 is an integrated circuit well suited to build VCTCXO for mobile communication. Temperature calibration is achieved in three calibration temperatures only. The trimming is done through a serial bus and the calibration information is stored in an internal PROM. This means no rework for trimming is needed. To build a VCTCXO additionally only crystal is required. The compensation method is fully analog, working continuously without generating any steps or other interference.
Wide Supply Voltage Range True Sine Wave Output Very High Level of Integration Electrically Trimmable Very Low Phase Noise Low Cost Minimum Operating Temperature -40 C
FEATURES
* * * * * * Very small size Minor current draw Wide operating temperature range Phase noise <-120 dBc/Hz at 100Hz offset Programmable VC-sensitivity Minimum Operating Temperature -40 for C MAS9270Cxx3
APPLICATIONS
* * VCTCXO for mobile phones VCTCXO for other telecommunications systems
BLOCK DIAGRAM
4 4
DA CLK PV VC
CUB INF SENS LIN
f(T)
MAS9270
TE1
4
f(T)
8
T
Vref
TMux
TE2
CDAC1
8
VDD
CDAC2
2
OUT X2 X1
VSS
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DA9270.008 11 September 2006
PIN DESCRIPTION
Pin Description Power Supply Voltage Programming Input Serial Bus Clock Input Serial Bus Data Input Temperature Output Test Multiplexer Output Voltage Control Input Crystal Oscillator Output Crystal/Varactor Oscillator Input Power Supply Ground Buffer Output Symbol VDD PV CLK DA TE1 TE2 VC X1 X2 VSS OUT x-coordinate 166 420 979 1234 1488 1742 185 439 1357 1790 2046 y-coordinate 1430 1435 1441 1441 1441 1441 153 149 149 166 153
Note: Because the substrate of the die is internally connected to GND, the die has to be connected to GND or left floating. Make sure that GND is the first pad to be bonded. Pick-and-place and all component assembly are recommended to be performed in ESD protected area. Note: Pad coordinates are measured from the left bottom corner of the chip to the center of the pads. The coordinates may vary depending on sawing width and location, however, distances between pads are accurate.
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Input Pin Voltage Power Dissipation Storage Temperature Note 1: Not valid for programming pin PV Symbol VDD - VSS PMAX TST Min -0.3 VSS -0.3 -55 Max 6.0 VDD + 0.3 20 150 Unit V V mW o C Note 1)
RECOMMENDED OPERATION CONDITIONS
Parameter Supply Voltage Supply Current Operating Temperature Storage Temperature Crystal Pulling Sensitivity Crystal Load Capacitance Symbol VDD ICC TOP TS S CL Conditions Vdd = 2.8 Volt Relative humidity = 15%...70% -30 -45 30 10 Min 2.7 Typ 2.8 Max 5.5 1.8 +85 +40 Unit V mA o C o C ppm/pF pF Note 1) 2)
Note 1: Minimum Supply Voltage 2.6 V for MAS9270Cxx2 version. Note 2: Minimum Operating Temperature -40 for MAS9270Cxx3 version. C
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DA9270.008 11 September 2006
ELECTRICAL CHARACTERISTICS
(recommended operation conditions)
Parameter Frequency Range Voltage Control Range Voltage Control Sensitivity (VCR = 0) Voltage Control Sensitivity (VCR = 1) Frequency vs. Supply Voltage Frequency vs. Load Change Output Voltage (10k // 10 pF) Compensation Range 2.5 ppm Compensation Range 2.0 ppm Compensation Range 2.5 ppm Compensation Range Linear Part Compensation Inflection Point Compensation Range Cubic Part Compensation CDAC1 (7 Bit) Compensation CDAC2 (2 Bit) Start up Time
Symbol fo VC VCSENS VCSENS dfo dfo Vout TC TC TC a1 INF a3 CX1 CX2 TSTART
Min 10.00 0 9 4
Typ
Max 30.00 Vdd 15 8 0.2 0.2
Unit MHz V ppm/V ppm/V ppm ppm Vpp
o o o
Note
1) 2) 3)
1.0 -30 -25 -40 -0.7 25 95 C10 C20 2 C10 + 18 C20 + 4 85 75 85 0.0 31
C C C C
2 3
4)
ppm/K
o
ppm /K pF pF ms
5) 6)
Note 1: default Note 2: VDD +/- 5% Note 3: R=10 kohm +/- 10%, C=10 pF +/- 10% Note 4: MAS9270Cxx3 Note 5: typ C10 = 13 pF Note 6: typ C20 = 6 pF (varactor capacitance at 1.8 V 12 pF)
IC OUTLINES
VDD PV CLK DA TE1 TE2
1584 m
MAS9270
VC
X1
X2
VSS
OUT
Die map reference
2204 m
Note 1: MAS9270 pads are round with 80 m diameter at opening. Note 2: Pins CLK and DA can either be connected to VSS or left floating, pin PV can either be connected to VDD or left floating and pin TE1 must be left floating in VCTCXO module end-user application. Note 3: Die map reference is the actual left bottom corner of the sawn chip.
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DA9270.008 11 September 2006
SAMPLES IN SB20 DIL PACKAGE
1 2 3
20 OUT 19 18 GND 17
MAS9270 YYWW XXXXX.X
TE2 4 TE1 5 DA 6 CLK 7 PV 8 VDD 9
10
16 X2 15 14 X1 13 12 VC 11
Top marking: YYWW = Year, Week XXXXX.X = Lot number
DEVICE OUTLINE CONFIGURATION
MSOP10 TE2 DA CLK PV VDD OUT VSS X2 X1 VC Top View
C = product version X = voltage version Y = year WW= week
9270 CX YWW
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DA9270.008 11 September 2006
PACKAGE (MSOP-10) OUTLINE
e S See Detail A c B E1 E1 B E E 5-15 Degrees L1 Detail A A2 A A1 D L G M A A 0 - 8 Degrees Gauge Plane L2 Seating Plane N F Land Pattern Recommendation b1 (b) Section B - B c1
Symbol A A1 A2 b b1 c c1 D E E1 e F G L (Terminal length for soldering) L1 L2 M N S
Min -0.00 0.75 0.15 0.15 0.08 0.08
Nom --0.85 ----
Max 1.10 0.15 0.95 0.30 0.25 0.23 0.18
Unit mm mm mm mm mm mm mm mm mm mm mm mm mm mm
0.40
3.00 BSC 4.90 BSC 3.00 BSC 0.50 BSC 4.8 0.50 0.60
0.80
0.95 REF 0.25 BSC 0.41 1.02 0.50
mm mm mm Mm
Dimensions do not include mold or interlead flash, protrusions or gate burrs. Reference Standard : JEDEC MO-187 BA.
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DA9270.008 11 September 2006
SOLDERING INFORMATION
N For Sn/Pb MSOP-10 Resistance to Soldering Heat Maximum Temperature Maximum Number of Reflow Cycles Reflow profile Seating Plane Co-planarity Lead Finish N For Pb Free, RoHS Compliant MSOP-10 Resistance to Soldering Heat Maximum Temperature Maximum Number of Reflow Cycles Reflow profile Lead Finish According to RSH test IEC 68-2-58/20 260C 3 Thermal profile parameters stated in IPC/JEDEC J-STD-020 should not be exceeded. http://www.jedec.org Solder plate 7.62 - 25.4 m, material Matte Tin According to RSH test IEC 68-2-58/20 2*220C 240C 2 Thermal profile parameters stated in JESD22-A113 should not be exceeded. http://www.jedec.org max 0.08 mm Solder plate 7.62 - 25.4 m, material Sn 85% Pb 15%
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DA9270.008 11 September 2006
EMBOSSED TAPE SPECIFICATIONS
P1 P2
E W F
PO
DO
T
BO
AO
User Direction of Feed
A
D1
Section A-A
KO
Pin 1 Designator
Dimension Ao Bo Do D1 E F Ko Po P1 P2 T W
Min/Max 5.00 0.10 3.20 0.10 1.50 +0.1/-0.0 1.50 min 1.75 5.50 0.05 1.45 0.10 4.0 8.0 0.10 2.0 0.05 0.3 0.05 12.00 +0.30/-0.10
Unit mm mm mm mm mm mm mm mm mm mm mm mm
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DA9270.008 11 September 2006
REEL SPECIFICATIONS
W2
A
D B
Tape Slot for Tape Start
C
N
W1
5000 Components on Each Reel Reel Material: Conductive, Plastic Antistatic or Static Dissipative Carrier Tape Material: Conductive Cover Tape Material: Static Dissipative
Carrier Tape Cover Tape End
Start
Trailer
Dimension A B C D N W 1 (measured at hub) W 2 (measured at hub) Trailer Leader Min
Components
Max 330 1.5 12.80 20.2 50 12.4 160 390, of which minimum 160 mm of empty carrier tape sealed with cover tape 1500 13.50
Leader
Unit mm mm mm mm mm mm mm mm mm
14.4 18.4
Weight
g
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DA9270.008 11 September 2006
ORDERING INFORMATION
Product Code MAS9270CTB1 MAS9270CTG1 MAS9270CASN06 Product VCTCXO IC 2.7 V VCTCXO IC 2.7 V VCTCXO IC 2.7 V Package Comments Die Size 2.204 x 1.584 mm Die Size 2.204 x 1.584 mm Tape & Reel, 5.000 pcs/reel Die Size 2.204 x 1.584 mm Die Size 2.204 x 1.584 mm Tape & Reel, 5.000 pcs/reel Die Size 2.204 x 1.584 mm Die Size 2.204 x 1.584 mm Tape & Reel, 5.000 pcs/reel
EWS Tested wafers 480 m EWS Tested wafers 215 m Green MSOP-10, Pb Free, RoHS Compliant/Top Marking CA MAS9270CTB2 VCTCXO IC 2.6 V EWS Tested wafers 480 m MAS9270CTG2 VCTCXO IC 2.6 V EWS Tested wafers 215 m MAS9270C2SN06 VCTCXO IC 2.6 V Green MSOP-10, Pb Free, RoHS Compliant /Top Marking C2 MAS9270CTB3 VCTCXO IC -40 C EWS Tested wafers 480 m MAS9270CTG3 VCTCXO IC -40 C EWS Tested wafers 215 m MAS9270C3SN06 VCTCXO IC -40 C Green MSOP-10, Pb Free, RoHS Compliant /Top Marking C3 Please contact Micro Analog Systems Oy for other wafer thickness options.
LOCAL DISTRIBUTOR
MICRO ANALOG SYSTEMS OY CONTACTS
Micro Analog Systems Oy Kamreerintie 2, P.O. Box 51 FIN-02771 Espoo, FINLAND Tel. +358 9 80 521 Fax +358 9 805 3213 http://www.mas-oy.com
NOTICE Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
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